Nonlinear JFET model for computer-aided circuit analysis

A simplified circuit model is proposed to represent the nonlinear d.c. and low-frequency small-signal operation of j.f.e.t.s. This model is particularly useful for computer-aided circuit analysis programs, such as the iterative nodal analysis program BIAS-3. Operation in the off, resistance, and pinch-off regions of the j.f.e.t. is included.