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Research Toward Wafer-Scale 3D Integration of InP Membrane Photonics With InP Electronics | IEEE Journals & Magazine | IEEE Xplore

Research Toward Wafer-Scale 3D Integration of InP Membrane Photonics With InP Electronics


Abstract:

In this study, we focus on the development of key processes towards wafer-scale 3-dimentional/vertical (3D) integration of Indium-Phosphide (InP) photonic membranes on In...Show More

Abstract:

In this study, we focus on the development of key processes towards wafer-scale 3-dimentional/vertical (3D) integration of Indium-Phosphide (InP) photonic membranes on InP electronics via adhesive bonding. First, we identified the most critical steps and optimized them to achieve high thermal and mechanical compatibility of components for the co-integration process. Next, we developed a strategy for InP-to-InP wafer bonding with high topology tolerance, and introduced hard benzocyclobutene (BCB) anchors to preserve the alignment and BCB thickness uniformity after bonding. The resulting bond layer is homogeneous in terms of physical and mechanical properties. Finally, we developed a novel method to selectively remove the InP substrate from the photonics side via wet etching while protecting the electronics carrier wafer with hermetic multi-layer coatings. The investigation of these key steps is essential for scalable 3D integration of photonics and electronics at ultra short distances (< 15 ~\mu \text{m} ).
Published in: IEEE Transactions on Semiconductor Manufacturing ( Volume: 37, Issue: 3, August 2024)
Page(s): 229 - 237
Date of Publication: 27 March 2024

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