Laminated Ferroelectric FET With Large Memory Window and High Reliability

In this work, we report a planar Si-based ferroelectric field-effect transistor (FEFET) characterized by a high memory window (MW) of 4.79 V, ten-year retention, and pass disturb-free characteristics. This achievement is realized through the use of a 20-nm-thick laminated Hf
$_{{0}.{5}}$
Zr0.5O2 (L-HZO) film with Al2O3 (AO)-insertion layers (ILs). The 2.4-Å-thick AO-ILs effectively severed the bulk-HZO film and scaled down each FE-thickness (
${t}_{\text {FE}}$
) in the L-HZO. This resulted in suppression of non-FE monoclinic phase formation to less than 10%, and more notably, an increase in the coercive field (
${E}_{C}$
) within the FE stack. With an increase in the number of HZO-lamination (
${N}_{\text {HZO}}$
), the
${E}_{C}$
was enhanced by 76% in L-HZO (
${N}_{\text {HZO}}$
= 4) compared to single-HZO (S-HZO). This led to an increase in effective polarization (
${P}_{\text {eff}}$
), representing the portion of remnant polarization (
${P}_{\text {r}}$
) uncompensated by channel-injected charge, thereby validly influencing the threshold voltage (
${V}_{\text {T}}$
) shift of FEFET. The augmented
${P}_{\text {eff}}$
in L-HZO (350% increase compared to S-HZO) was directly confirmed through a more pronounced
${V}_{\text {T}}$
shift by the change of
${P}_{\text {r}}$
, which was 230% steeper in L-HZO compared to S-HZO. The revealed mechanism behind the enhanced MW and reliability in laminated-FE, stemming from the increased
${P}_{\text {eff}}$
rooted in enlarged
${E}_{C}$
, paves the way for designing the FE-stack for high-density memory or neuromorphic applications.