Characterization and Modeling of Hot Carrier Degradation Under Dynamic Operation Voltage

In practical electronic setups, most circuits are operating under dynamic condition, thus the aging models derived under static bias could lead to unexpected deviation from the real circumstance and even errors. Here in this paper, we studied the device degradation under long-period dynamic stress, which aims to mimic the device degradation at alternating voltages. Combined with the degradation characterization, models considering partial recovery after stress removal and degradation at different stress levels are developed. By comparing the test data with the model calculation, it can be seen that the calculation error of the model is within 3%, which meets the requirement of practical engineering. The proposed models could benefit the reliability design against dynamic hot carrier degradation for modern circuits.