An on-chip smart memory for a data flow CPU

Register Alias Table (RAT) is an on-chip Smart memory for HPSm . a Berkeley data Row CPU. It is a multiport memory that has content addressability, support for branch prediction and exception handling in addition to conventional read and write operations. It is implemented in a 1.6μ double metal CMOS process. This memory performs 15 operations within a cycle time of 1031s. has 34,658 transistors, occupies an area of 3.8mm x 5.2mm, and dissipates 0.67W.