A versatile data-transfer control unit for a parallel processor system

VLSI parallel processor system is one of promising candidates for the future machine to carry out hevy-duty numerical computation. For the parallel system, not only PE(processor element) operation speed but also inter-PE data transfer is very important to achieve high performance. Especially, in the parallel processor system with localized memories and a connection network, there are two major questions: how to realize efficient data transfer between local memories with minimum interference with PE operations." and "how to assign the data in local memories?"