A 3.5ns CMOS 64K ECL RAM at 77/spl deg/K

This paper will describe a 64K CMOS RAM incorporating CMOS ECL receivers that was fabricated in a process optimized for liquid-nitrogen operation [ I]. The combination of small signal interfaces such as ECL levels and liquid nitrogen operation in this all CMOS design results in faster access times than previously reported for any technology at the 64K level.