A novel logarithmic response CMOS image sensor with high output voltage swing and in-pixel fixed pattern noise reduction

A novel logarithmic response 0.25 /spl mu/m CMOS image sensor technology for high output swing and low noise error is proposed. The experimental results show that the new cell has 4 times higher output voltage swing. Optimized simulation results show 6.5 times larger output voltage swing, which is achievable for an input signal range of 0.01 lux to 100,000 lux. With this wider swing, the effect of fixed pattern noise (FPN) reflecting on the digital output can be reduced significantly. In addition, after adding a correlated double sampling (CDS) control transistor, the output voltage difference variation due to FPN is greatly reduced from 73 mV to 15 mV.