Theory and design of an ultra-linear square-law approximated LDMOS power amplifier in class-AB operation

This paper describes a power amplifier, employing parallel-connected laterally diffused metal-oxide semiconductor (LDMOS) devices with optimized channel widths and bias offsets to approximate ideal square-law behavior of the overall transconductance in class-AB operation. The proposed method results in a significant linearity improvement over a large dynamic range in comparison to a conventional amplifier in class-A or class-AB operation. Measurements demonstrate an improvement of 20 dB in third-order intermodulation distortion and 10 dB in adjacent channel power ratio for wide-band code-division multiple access at 12-dB output power backoff from the 1-dB gain compression point. Consequently, this amplifier can be operated more toward the compression region with better linearity and drain efficiency compared to a conventional LDMOS power-amplifier design.