A scalable and programmable architecture for 2-D DWT decoding

The compression of still images by means of the discrete wavelet transform (DWT), adopted in the JPEG-2000 and MPEG-4 standards, is becoming more and more widespread because it yields better performance than other compression methods, such as discrete cosine transform. The demand of efficient architectures for 2-D DWT coding and decoding for a variety of different applications and embedded systems is rapidly increasing. This paper presents the implementation of a 2-D DWT decoder for Mallat-tree decomposition, suitable for low power applications, such as portable devices. The decoder design has been synthesized and validated in 0.35-/spl mu/m CMOS technology. The architecture is scalable according to the desired maximum image size, the maximum DWT kernel length, and arithmetic accuracy, and it is programmable at run-time to process different image sizes and use different DWT kernels.