VLSI implementation for low-complexity full-search motion estimation

Although many ASICs for motion estimation have been developed, either the chip complexity is too high or the optimal accuracy was not achieved. In this study, an adaptive full-search algorithm is presented to reduce the searching complexity with a temporal correlation approach. The efficiency of the proposed full search can be promoted about 5-10 times in comparison with the conventional full search while the searching accuracy remains intact. Based on the adaptive full-search algorithm, a real-time VLSI chip is regularly designed by using the module base. For MPEG-2 applications, the computational kernel only uses eight processing elements to meet the speed requirement. The processing rate of the proposed chip can achieve 53 K blocks/s to search from -127 to +127 vectors, using only 8 K gates.