SILC effects on E/sup 2/PROM memory cell reliability

In this paper, we will investigate SILC effects on the reliability of E/sup 2/PROM memories. Particularly, we will analyze the influence on the retention properties of E/sup 2/PROM memory devices of program/erase number of cycles and bias conditions, oxide thickness scaling and quality, and storage field. To accomplish this task, we will use a recently proposed compact E/sup 2/PROM model, which has been extended to include the stress-induced leakage current (SILC), thus bridging the gap between the oxide quality characterization activity performed on MOS transistors and capacitors, and the actual impact of SILC on the functioning of E/sup 2/PROM memories.