SOI n-MOSFET low-frequency noise measurements and modeling from room temperature up to 250/spl deg/C

This paper deals with SOI n-MOSFET low-frequency noise measurements, analysis, and modeling from room temperature up to 250/spl deg/C. We observed the occurrence of a Lorentzian-like noise component depending on bias and temperature conditions. An engineering Lorentzian model has been validated and used in order to determine the SOI floating body effect related noise, continuously from fully- to partially-depleted regimes. General considerations about low-noise high-temperature analog circuits are discussed.