A high gain CMOS operational amplifier with negative conductance gain enhancement

A fully differential CMOS operational amplifier using a negative conductance gain enhancement technique is presented. The amplifier was fabricated in an AMI 0.5 /spl mu/m CMOS process with an active area of 0.17 mm/sup 2/. With a 3 V supply, a DC gain of more than 80 dB was measured. The gain exceeded 60 dB for a 240 mV output swing.