Three stage amplifier with positive feedback compensation scheme

A CMOS opamp that can drive large capacitive loads is presented. The technique employs a positive feedback compensation (PFC) to improve frequency response as compared to nested Miller compensation (NMC), allowing the circuit to occupy less silicon area and straightforward design. At 1.5 V, the circuit dissipates 275 /spl mu/W, has more than 100 dB gain, a gain bandwidth of 2.7 MHz and 1.0 V//spl mu/s average slew rate while driving a 130 pF load.