A comparison between single versus dual spindle saw processes for copper metallized wafers

Earlier studies have shown significant differences in backside silicon chipout between aluminum and copper metallized wafers when sawn with a single spindle saw. These earlier studies focused on the results of two designs of experiments to understand the key process parameters and their interactions in order to optimize the wafer saw process. This study was driven by a number of qualification failures that were observed in high temperature operational life (HTOL) on a 3 metal layer copper CMOS device. The failure analysis of these units showed top side silicon cracks that originated from the backside edge of the die where silicon chipouts as large as 4 mil were observed. To reduce the severity of the backside chipouts, key process parameters were optimized for a single spindle wafers saw machine. Newer process technologies have emerged since this study and five to six metal layers of copper are now the development focus. This paper compares the processes for sawing 5 metal layer copper wafers with a single and dual spindle wafer saw and also compares the results with the 3 metal layer copper metallized wafers. The previous work focused on optimization for a single spindle process and data from another earlier study suggests that a double pass saw, where the top metal is cut on the first pass followed by a final cut on the second pass, may provide even further reduced backside silicon chipout. To reduce the cycle time of this approach, a dual spindle saw process was chosen in which the cycle time is similar to a single pass approach.