Ultra-thinned chips integration: technological approach and electrical qualification

Development of advanced packaging technologies such as Chip Size Packages, Multi Chip Modules and 3D stacks of MCMs has led to a significant reduction in mass and volume of electronics systems. Among these techniques, we develop a vertical integration called "Ultra-Thin Chip Stacking" interesting for all applications where size and weight reductions are of major importance (portable electronics, biomedical, aerospace...).