Implementation of module combining multiplication, division, and square root

The implementation of a module that performs radix-2 multiplication, division, and square root is presented. The module is compact because most of the components are shared by all three operations, the complexity being similar to that of a radix-2 divider. All three operations have the same execution time; one bit of the result is produced per cycle, beginning with the most significant bit. The cycle time is kept small by the use of carry-save addition and result-digit selection based on a low-precision estimate of the partial remainder. The module incorporates on-the-fly conversion and routing of the result.<
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