Spelunking in the data mine: on data mining as an analysis tool for the optimization of microprocessor speed

The quest for increased microprocessor speeds is inexorable... as microprocessor speeds pass two gigahertz, semiconductor manufacturers must wring all the available microprocessor speed from existing processes by any means possible. These means include designed experimentation and analysis of tightly controlled processes, many of which are approaching physical limits. Some questions an engineer must face when confronted with optimizing a 400-operation process is: At which operation to begin, and what factors in that operation influence what responses in the process? Then, after defined optimization projects have been completed: Have all the available opportunities for optimization been exhausted? One of the major products of microelectronics manufacturing is data: huge quantities of data are generated on every production lot processed through a fabrication facility. However, most of these data are observational (some would say 'happenstance') in nature, and are wrought with the problems of classical statistical analysis that experimental design procedures seek to avoid. Data Mining is loosely defined as an activity of extracting information from observational databases, wherein the goal is to discover hidden facts. One promising data mining technique is binary recursive partitioning. This technique is implemented in Classification And Regression Tree software by Salford Systems. This paper will explore the effective use of the CART/spl reg/ software tool to sift through the vast observational data generated in the production of microprocessors in the search of speed optimization opportunities. The procedures for using CART/spl reg/ to optimize microprocessor speed will be explained and demonstrated in several case studies.