Read Disturbances in Cross-Point Phase-Change Memory Arrays—Part I: Physical Modeling With Phase-Change Dynamics

Phase-change memory (PCM) connected to an additional selector has been implemented in cross-point arrays for storage class memory applications. In the one-PCM and one-selector (1S-1R) configuration, the selector should be turned on first to read the resistance state of the PCM. This requires a large read voltage (
${V}_{read}$
), and a high read current from the PCM is instantly produced, which causes read disturbances. To understand the underlying mechanism of the disturbance, in this study, we developed a physics-based Verilog-A model to describe the measured electrical behavior of the 1S-1R cell in HSPICE by considering thermally induced crystallization and melting dynamics. Based on
${V}_{TH}$
, which is the voltage induced when the selector is on, the crystalline and amorphous phases of the PCM can be identified indirectly. Based on the measured data, when the pristine amorphous state of the PCM is programmed by a higher SET current (
${I}_{SET}$
),
${V}_{TH}$
decreases owing to enhanced crystallization, leading to a low-resistance state. However,
${V}_{TH}$
subsequently begins to increase with respect to
${I}_{SET}$
, which results in a U-shaped
${V}_{TH}$
–
${I}_{SET}$
curve. It is inferred that melting is preferred at temperatures above 900 K induced by the high-read current. The
${V}_{TH}$
increase induced by the amorphization can be explained by transient simulations. The simulation results are in good agreement with the experimental data and reveal that the temperature generated from the 1S-1R cell plays an important role in triggering the unwanted phase transition of the GeSbTe layer during the read operation.