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Effects of Reliability Mechanisms On VLSI Circuit Functionality

Ellis, Wayne  
Sponsored by: IEEE Reliability Society
Presented at: International Reliability Physics Symposium (IRPS)
Publication Date: Nov-2004
ISBN: 0-7803-9643-X
Run Time: 1:00:00

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Abstract
This tutorial discusses examples of reliability mechanisms and how these can affect the normal operation of selected VLSI circuits. Large circuit-count ASIC chips use standard digital and analog circuits such as Logic gates, eSRAM, eDRAM and I/O circuits which must function properly under various voltage and thermal environments. These chips are subjected to Reliability Screens such as Burn In to activate latent defects and screen out those chips that cannot meet product specifications for performance, power and operating margins. The advent of degraded VLSI circuit operating margins due to the activated defects as well as reliability mechanisms such as negative bias temperature instability (NBTI), hot carrier injection (HCI), and others will be discussed. How these failing circuits can then manifest themselves in observed product failures will also be discussed. After completing this course you should be able to develop an understanding of: Reliability and today's VLSI chips; Reliability and VLSI design; VLSI circuits; Circuit reliability mechanisms.

Educational Course Subject Areas
Circuits & DevicesReliability

Keywords
Application Specific Integrated Circuit (ASIC) burn in critical area defect destructive read Dynamic Random Access Memory (DRAM) failure analysis logic circuit redundancy reliability mechanism Static Random Access Memory (SRAM) Very Large Scale


 
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