A fast compressive sensing reconstruction hardware based on modified subspace pursuit

Compressive sensing theory is an attractive way in signal processing due to its capability of sampling signals at sub-Nyquist rate. In this paper, a modified subspace pursuit algorithm is proposed to reconstruct compressed signals. The proposed algorithm reduces the complexity by omitting one of the least square operations. A high speed hardware is implemented in SMIC 65nm CMOS. The ACD algorithm is used when solving least square problem. Systolic array architecture is used and multipliers are reused to the most extent to reduce area. The accelerator utilizes a measure vector with 64 elements to reconstruct a digital signal with length 256 and sparsity 8. The synthesized design area is 3.33 mm
²
and reconstruction time is 7.42us