An approach to VLSI circuit reliability optimization considering the hot electron effects

An approach to suppressing the degradation caused by hot electron effects is proposed in which releasing the stress of critical transistors by optimal parametric design is presented, and design-of-experiment techniques are used to improve its efficiency. An application to a VLSI sense amplifier is presented, in which a significant reduction in the hot electron induced delay shift is achieved. For the specific circuit considered, the proposed approach has led to a simpler practical method of VLSI circuit reliability improvement considering hot electron effects, in comparison with the generalized formulation of drift reliability optimization presented by M.A. Styblinski and M. Huang (1991).<
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