Printed FEDs-technical advances and manufacturing cost modelling

Summary form only given. We report the latest progress in developing field emission cathodes by screen-printing and the results of modelling the manufacturing costs of this technique for large TV applications. We have previously demonstrated gate-controlled 32/spl times/32 pixel devices with a spin coated emitter layer and sputter-coated/photolithographically patterned tracks. Recent work has concentrated on the far more difficult task of a fully printed display. We describe the now routine screen printing of cathode conductor tracks and field emitter layers for 32/spl times/32 pixel devices using an industrial standard screen printer. Improvement in the uniformity of the screen printed inks has resulted in switching voltages reducing from /spl sim/200 V in the IDW '99 device to /spl sim/60 V. Progress is reported, describing the move to larger display formats. To confirm the suitability of our technology approach for consumer priced TV displays, we have used modified Stanford Resources Inc. (SRI) cost models to compare, on an equal basis, the manufacturing costs for our low cost printed FED approach with-those for 42" plasma display panels (PDPs). It will be shown that PFE based displays could be produced at costs approaching half that predicted for the equivalent PDP.