Abstract:
This paper presents an 8 GHz subharmonically injection-locked PLL (SILPLL), which is cascaded with a 24 GHz quadrature injection-locked oscillator in 130 nm CMOS. The pro...Show MoreMetadata
Abstract:
This paper presents an 8 GHz subharmonically injection-locked PLL (SILPLL), which is cascaded with a 24 GHz quadrature injection-locked oscillator in 130 nm CMOS. The proposed SILPLL adopts an envelope-detection based injection-timing calibration for synchronous reference pulse injection to a VCO. With one of the largest frequency division ratios (N=80) reported so far, the SILPLL exhibits 124 fs and 130 fs RMS jitter at 8 GHz and 24 GHz, respectively, with <;-49 dBc reference spur. The measured phase noise at 1 MHz offset is -114 dBc/Hz at 8 GHz and -104 dBc/Hz at 24 GHz.
Date of Conference: 04-06 June 2017
Date Added to IEEE Xplore: 07 July 2017
ISBN Information:
Electronic ISSN: 2375-0995