Properties of SiO2/4H-SiC interfaces with an oxide deposited by a high-temperature process

Summary form only given. The complete presentation was not made available for publication as part of the conference proceedings. This work reports on the physical and electrical characterization of the oxide/semiconductor interface in MOS capacitors with the SiO
2
layer deposited by a high temperature process from dichlorosilane and nitrogen-based vapor precursors and subjected to a post deposition annealing process in N
2
O. Low interface state density (D
it
≈ 9.0×10
¹¹
cm
⁻²
eV
⁻¹
) was found at 0.2 eV from E
C
, which is comparable to the values typically obtained in other lower temperature deposited oxides (e.g., TEOS). A barrier height of 2.8 eV was derived from the Fowler-Nordheim plot, very close to the ideal value expected for SiO
2
/4H-SiC interface. Basing on these preliminary results, the integration in MOSFETs devices can be envisaged.