Al deposition temperature process window for 0.20 /spl mu/m Al RIE interconnections

As VLSI dimensions decrease to below 0.2 /spl mu/m, BEOL processing requirements are becoming more stringent. Al conductor line widths and pitches are becoming smaller and aspect ratios are increasing in order to meet design requirements. At the same time, process windows for producing these BEOL wires are becoming more difficult to maintain. This paper focuses on the process window for Al(Cu) deposition temperature for a 0.2 /spl mu/m wide, 0.44 /spl mu/m pitch, Al RIE interconnection used in a 256 Mbit DRAM. While surface roughness and Al texture degrade slightly with increasing deposition temperature, other properties like RIE etchability, /spl Theta/-Al/sub 2/Cu participate distribution and texture, sheet resistance and opens/shorts yield either improve or are unaffected as the Al deposition temperature is increased. All of these parameters combine to suggest a wide process window for Al deposition temperature for 0.2 /spl mu/m Al RIE interconnections.