Abstract:
By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiNx gate dielectric w...Show MoreMetadata
Abstract:
By employing an interface protection technique to overcome the degradation of etched GaN surface in high-temperature process, highly reliable LPCVD-SiNx gate dielectric was successfully integrated with recessed-gate structure to achieve high-performance enhancement-mode (Vth ~ +2.37 V @ Id = 100 μA/mm) GaN MIS-FETs with high stability and high reliability. The LPCVD-SiNx/GaN MIS-FET delivers remarkable advantages in high Vth thermal stability, long time-dependent gate dielectric breakdown (TDDB) lifetime and low bias temperature instability (BTI).
Published in: 2016 IEEE International Electron Devices Meeting (IEDM)
Date of Conference: 03-07 December 2016
Date Added to IEEE Xplore: 02 February 2017
ISBN Information:
Electronic ISSN: 2156-017X