A 1.2V 10-bit 500-MS/s current steering DAC in 90nm technology

Digital-to-Analog converter (DAC) is a fundamental device in data processing systems. It serves as a conversion interface to reconstruct the analog signal from the digital output of the signal processors. In this work, the design and implementation of a 10-bit Segmented Current Steering DAC is carried out at 500 MHz clock frequency and 1.2 V supply voltage. The Segmented architecture provides the advantage of reduction in the die area occupied by the circuit in an IC. The current source is implemented as a cascode stage to reduce the dependence of current on the output voltage and also to make the current less dependent on the process technology parameter. The current cell is implemented as a differential current steering topology which reduces the total current flowing through the cell by half the single-ended counterpart thus making the design power efficient. The DAC is tested for ramp and sinusoidal input and the SFDR of the output is calculated by passing the current through resistors and also through trans-impedance amplifier of gain 40 dB and 60 dB.