Acceleration of RANSAC algorithm for images with affine transformation

RANSAC is a popular and robust fitting algorithm. In the field of image processing, RANSAC can be successfully used to reject false correspondences between similar images. Due to its iterative nature, RANSAC is computationally demanding and time consuming. When the target application operates in real-time, conventional approaches based on personal computers usually fail to meet the requirements. In this paper, a hardware accelerator for RANSAC, suitable for robotic vision applications, is proposed. The proposed scheme is applied to reject false correspondences between point features across consecutive video frames. Feature detection and matching is produced by an extraction and matching module. It is assumed that successive frames are related with affine transformation. The proposed accelerator is capable of processing 128 matches and the execution of RANSAC algorithm lasts for as many clock cycles as the number of the selected random samples. The system was simulated successfully and its operation was verified using the DE2i-150 development board. Considering Cyclone IV technology, the maximum supported frequency was found to be 15MHz.