Expansion of operations in a multicore dataflow DSP

Nowadays, there are numerous multicore processors for parallel computing. The potential for parallelism is inherently provided by the dataflow execution model, which is a natural fit for exploiting the parallelism inherent in programs, especially digital signal processing applications. In our laboratory, we have developed a ring interconnected multicore dataflow DSP called LSC-Based DSP. In this work we supplement a subtraction operation to LSC-Based DSP with the function of duplicating operand data in order to provide a higher degree of programmability. We implement the new our DSP on an FPGA development board, and verify the functionality of the subtraction instruction by executing several test programs on our new DSP.