A systematic exploration of the failure mechanisms in underfilled flip-chip packages

A study on failure mechanisms in underfilled flip-chip packages is presented here. The flip-chip packages were built after conducting a range of finite element modeling studies that varied only the geometric entities in the package. Thereafter, these packages were stressed under a thermal-cyclic loading condition and were probed for electrical failures during the course of thermal cycling. The finite element analysis' thermal cyclic modeling simulations show a good correlation between the predicted plastic-energy dissipation per unit volume in the solder stack and the measured electrical and physical failures in the packages. The empirical correlations developed in this study can be extended to a generic package for predicting the failures associated with reliability either during testing or under field operating conditions.