Cu-Cu wafer bonding: An enabling technology for three-dimensional integration

Wafer-level hybrid bonding with Cu/SiO
₂
is a very promising technique to fabricate three-dimensional integrated circuits, because it enables high performance operation with low power consumption as well as low 3D stacking costs. For a successful hybrid bonding process, the particular bonding properties of unstructured Cu-Cu and Si-SiO
₂
wafer bonding were investigated. For Cu-Cu bonding, the Cu oxide removal prior to bonding is one of the keys to success. The combination of ex-situ citric acid and in-situ forming gas pre-treatments before bonding resulted in sufficient bonding quality at low temperature as low as 200°C. In the case of plasma activated Si-direct wafer bonding, a bonding strength similar to the Si bulk fracture strength was achieved. So far, the isolated Si-direct and Cu-Cu thermo-compression wafer bonding processes were successfully demonstrated. Finally, crucial interdependencies, such as the plasma activation on Cu surfaces and the citric acid treatment on Si surfaces, for a successfully hybrid wafer bonding were presented.