Novel architectures for zinc-oxide junctionless transistor

We propose a new device architecture for ZnO based semiconductor on insulator - junctionless transistor and bulk planar junctionless transistor. It is based on the idea of growing a heavily doped substrate layer (HDSL) on the lightly doped substrate instead of using highly doped substrate. We show that the HDSL helps in reducing the effective channel thickness by half, there by increasing the ON-to-OFF current ratio and making the device highly scalable. Due to its higher bandgap and lower dielectric constant the proposed ZnO transistor has better subthreshold swing and lower V
T
than its Si counter part of same dimensions.