A 13-bit, low-power, compact ADC suitable for sensor applications

A 100μW, 13bit ADC used for sensor array applications is presented in this paper. The ADC employs an extended counting architecture in which the residual error from a first-order incremental ΣΔ modulator is encoded by a cyclic ADC to achieve high accuracy at a relatively high speed. Hardware reuse technique is utilized for low power consumption and small silicon area. The prototype ADC is implemented in 0.18μm CMOS technology with 1.8V supply voltage and the core area is only 0.06mm² including control logic. The ADC shows a peak SNDR/SFDR of 65.4dB/71.9dB.