High Temperature Characterization of 41-SiC Normally-On Vertical JFETs with Buried Gate and Buried Field Rings

The continuous progress made over the past years in terms of material quality and key technological issues combined with a better understanding of the devices' physics have placed silicon carbide (SiC) devices in a position from where they can challenge the present day silicon (Si) solutions in high power/high temperature applications. Since they avoid gate oxide-related problems such as channel mobility and high temperature long term reliability typical of SiC MOSFETs, SiC JFETs are attractive candidates for applications requiring high power/high temperature operation. This paper reports for the first time experimental results of a 4H-SiC normally-on JFET using buried p+ gates and buried field rings (BFRs) in the termination region. The device uses a double layer epitaxial process with a novel, more highly doped buffer layer. The paper also investigates the high temperature operation (up to 300deg C) of the device