A highly integrated 0.25 /spl mu/m BiCMOS chipset for 3G UMTS/WCDMA handset RF sub-system

The complete active portion of the 3G UMTS/WCDMA cellular handset RF sub-system is achieved with three RFICs. This chipset comprises a fully integrated ZIF receiver including RF VCO/PLL and UNITS clock generation, a fully Integrated direct conversion like transmitter including RF VCO/PLL, and a 25 dBm average power amplifier including power detection circuitry. The three RFICs use the same baseline 0.25 /spl mu/m BiCMOS technology opening possibilities to even higher integration level. This chipset is targeted at handset class 3 and 4 (PA is class 4 compatible only) European and Japanese 3 G UMTS and WCDMA standards.