High VelociTI processing [Texas Instruments VLIW DSP architecture]
Seshan, N.
Signal Processing Magazine, IEEE
Volume 15, Issue 2, Mar 1998 Page(s):86 - 101, 117
Digital Object Identifier 10.1109/79.664702
Summary:The Texas Instruments VelociTI architecture is a very long
instruction word (VLIW) architecture. The TMS320C6x family of digital
signal processors (DSPs) is the first to employ the VelociTI
architecture, with the TMS3206201 (C6201) being the first device in this
family. The C6201 is based on the fixed-point TMS320C62x (C62x) CPU.
This article describes the VelociTI VLIW architecture and discusses the
C62x, C67x, C6201, and the VelociTI development tools. An overview of
the VelociTI including architectural principles, data path, instruction
set, and pipeline operation is presented, and both the C62x fixed-point
CPU and the C67x floating-point CPU are described. A summary of the C62x
benchmark performance is also presented. The chip-level support outside
the CPU that allows the C6201 to operate in a variety of
high-performance DSP environments is also described. An overview of the
C6x development environment is also given, demonstrating the breadth of
the development environment and illustrating the programming
methodology. The article concludes with a performance analysis of the C
compiler
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