Limitations and challenges of computer-aided design technology forCMOS VLSI
Bryant, R.E.; Kwang-Ting Cheng; Kahng, A.B.; Keutzer, K.; Maly, W.; Newton, R.; Pileggi, L.; Rabaey, J.M.; Sangiovanni-Vincentelli, A.
Proceedings of the IEEE
Volume 89, Issue 3, Mar 2001 Page(s):341 - 365
Digital Object Identifier 10.1109/5.915378
Summary:As manufacturing technology moves toward fundamental limits of
silicon CMOS processing, the ability to reap the full potential of
available transistors and interconnect is increasingly important. Design
technology (DT) is concerned with the automated or semi-automated
conception, synthesis, verification, and eventual testing of
microelectronic systems. While manufacturing technology faces
fundamental limits inherent in physical laws or material properties,
design technology faces fundamental limitations inherent in the
computational intractability of design optimizations and in the broad
and unknown range of potential applications within various design
processes. In this paper, we explore limitations to how design
technology can enable the implementation of single-chip microelectronic
systems that take full advantage of manufacturing technology with
respect to such criteria as layout density performance, and power
dissipation
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