A Framework for Reliability Assessment and Enhancement in Multi-Processor Systems-On-Chip
Beltrame, G.; Bolchini, C.; Fossati, L.; Miele, A.; Sciuto, D.
Defect and Fault-Tolerance in VLSI Systems, 2007. DFT apos;07. 22nd IEEE International Symposium on
Volume , Issue , 26-28 Sept. 2007 Page(s):132 - 142
Digital Object Identifier 10.1109/DFT.2007.35
Summary:Reliability issues play a relevant role in the design of embedded systems for critical applications; this and the always increasing performance requirements lead to the adoption of new architectural solutions, as shown by the introduction of Multi-Processor Systems-on- Chip (MPSoC). MPSoCs raise new challenges related to the complexity of the interactions among several independent cores. This paper presents a framework, based on a simulation platform, for the design of this kind of embedded systems; the framework supports the use of reliability techniques in order to address fault detection and tolerance issues. The simulation platform is also adopted for a reliability assessment task, achieved by exploiting fault injection targeting each component of the system and by monitoring the effects on the entire architecture.
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