Simulating Resistive-Bridging and Stuck-At Faults
Piet Engelke; Polian, I.; Renovell, M.; Becker, B.
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Volume 25, Issue 10, Oct. 2006 Page(s):2181 - 2192
Digital Object Identifier   10.1109/TCAD.2006.871626
Summary:The authors present a simulator for resistive-bridging and stuck-at faults. In contrast to earlier work, it is based on electrical equations rather than table look up, thus, exposing more flexibility. For the first time, simulation of sequential circuits is dealt with; interaction of fault effects in current time frame and earlier time frames is elaborated on for different bridge resistances. Experimental results are given for resistive-bridging and stuck-at faults in combinational and sequential circuits. Different definitions of fault coverage are listed, and quantitative results with respect to all these definitions are given for the first time

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