Differential Analog Layout for Improved ASET Tolerance
Kelly, A.T.; Fleming, P.R.; Holman, W.T.; Witulski, A.F.; Bhuva, B.L.; Massengill, L.W.
Nuclear Science, IEEE Transactions on
Volume 54, Issue 6, Dec. 2007 Page(s):2053 - 2059
Digital Object Identifier   10.1109/TNS.2007.910124
Summary:Single-event transients (SETs) affecting a single side of a differential data path have been shown to cause signal degradation and data loss. A radiation hardened by design (RHBD) transistor layout technique is demonstrated that promotes charge collection on both sides of the differential data path. The induced common-mode error voltage is suppressed by the differential circuit, significantly reducing the SET amplitude.

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