Dynamic testing of Xilinx Virtex-II field programmable gate array (FPGA) input/output blocks (IOBs)
Swift, G.M.; Rezgui, S.; George, J.; Carmichael, C.; Napier, M.; Maksymowicz, J.; Moore, J.; Lesea, A.; Koga, R.; Wrobel, T.F.
Nuclear Science, IEEE Transactions on
Volume 51, Issue 6, Dec. 2004 Page(s): 3469 - 3474
Digital Object Identifier   10.1109/TNS.2004.839190
Summary: Heavy-ion irradiation and fault injection experiments were conducted to evaluate the upset sensitivity of the Xilinx Virtex-II field programmable gate arrays (FPGAs) input/output block (IOB). Full triple module redundancy (TMR) of the IOBs, in combination with regular configuration scrubbing, proved to be a quite effective upset mitigation method.

» View citation and abstract

Log in by entering your IEEE Web Account Username and Password.

IEEE Communications Society members: If you subscribe to the IEEE Electronic Periodicals Package or IEEE Electronic Periodicals Package Plus, you must access your subscription at www.comsoc.org.

Check with your librarian, information professional, or system manager to determine if you need to log in. Please complete the online Technical Support Form if you need assistance.

Select the Purchase History link to access the document. You will have 5 Days after purchase to access the Full Text PDF. Please complete the online Technical Support Form if you need assistance.

• Search and access Abstract records free of charge
• Register for table of contents alerts
• Purchase Full Text PDF documents

» Learn more about subscription options or how to become an IEEE Member.