Electrical and Optical Chip I/O Interconnections for Gigascale Systems
Bakir, M.S.; Bing Dang; Ogunsola, O.O.A.; Sarvari, R.; Meindl, J.D.
Electron Devices, IEEE Transactions on
Volume 54, Issue 9, Sept. 2007 Page(s):2426 - 2437
Digital Object Identifier 10.1109/TED.2007.903203
Summary:This paper describes fully compatible, high-density, electrical, and optical chip input/output (I/O) interconnect networks for gigascale systems. All optical I/O interconnects are based on the use of low-loss microscopic polymer pins (pillars). Their compatibility with electrical solder-bump fabrication and assembly are demonstrated. Moreover, we describe the use of metal-coated polymer pins to provide both an electrical path and an optical path between the chip and the substrate. Such I/O interconnects are called dual-mode I/Os. The tradeoffs between the electrical resistance and mechanical compliance of the dual-mode pins are reported. Moreover, the minimum thickness of metal needed to enable each I/O to operate at its electrical bit-rate limit is derived. A chip containing dual-mode I/Os is assembled on a substrate containing electrical and optical interconnects and demonstrates the dual-mode functionality of the I/Os. Dual-mode polymer pins that are 55 mum in diameter and 110 mum in height are measured to have an electrical resistance of approximately 50 mOmega and attenuate the optical intensity by less than 0.15 dB (632.8-nm wavelength). The use of an optical-bonding polymer is shown to improve optical coupling efficiency by up to 2 dB. Lateral and vertical compliance measurements of the polymer pin are also reported.
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