Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGeheterostructure channel
Yee-Chia Yeo; Subramanian, V.; Kedzierski, J.; Peiqi Xuan; Tsu-Jae King; Bokor, J.; Chenming Hu
Electron Devices, IEEE Transactions on
Volume 49, Issue 2, Feb 2002 Page(s):279 - 286
Digital Object Identifier   10.1109/16.981218
Summary:Thin-body p-channel MOS transistors with a SiGe/Si heterostructure channel were fabricated on silicon-on-insulator (SOI) substrates. A novel lateral solid-phase epitaxy process was employed to form the thin-body for the suppression of short-channel effects. A selective silicon implant that breaks up the interfacial oxide was shown to facilitate unilateral crystallization to form a single crystalline channel. Negligible threshold voltage roll-off was observed down to a gate length of 50 nm. The incorporation of Si_0.7Ge_0.3 in the channel resulted in a 70% enhancement in the drive current. This is the smallest SiGe heterostructure-channel MOS transistor reported to date. This is also the first demonstration of a thin-body MOS transistor incorporating a SiGe heterostructure channel

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