A novel capacitor-less DRAM cell using thin capacitively-coupled thyristor (TCCT)
Hyun-Jin Cho; Nemati, F.; Roy, R.; Gupta, R.; Yang, K.; Ershov, M.; Banna, S.; Tarabbia, M.; Sailing, C.; Hayes, D.; Mittal, A.; Robins, S.
Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International
Volume , Issue , 5-5 Dec. 2005 Page(s):311 - 314
Digital Object Identifier   10.1109/IEDM.2005.1609337
Summary:A capacitor-less DRAM cell using a thin capacitively-coupled thyristor (TCCT DRAM) is introduced. Experimental results from unit memory cell fabricated in a 130nm SOI logic technology demonstrate Ion/Ioff ratio of 10⁷, non-destructive read; write speed less than 2ns at 125C, and solid retention characteristics. These cell characteristics combined with a small cell area (as low as 9F²) and simple process integration make TCCT DRAM a suitable candidate for high-performance high-density embedded or standalone memory applications

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