INALSYS: a layout automation system based on analog layout constraints
Youngsoo Kim; Hyunsang Cho; Kwangsub Yoon
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Volume 2, Issue , 3-6 Aug. 1997 Page(s): 1209 - 1212 vol.2
Digital Object Identifier   10.1109/MWSCAS.1997.662297
Summary: An analog layout system that can handle analog constraints is presented in this paper. In order to process the analog layout constraints, parameterizable module library and the effective floorplanning model that encapsulates well-merging is proposed. Also, global routing algorithm is modified by adopting divide-by-triangle method. This layout system has been tested on several benchmark circuits and displayed comparable results to the conventional layout system in terms of layout quality, expandability and execution time.

» View citation and abstract

Log in by entering your IEEE Web Account Username and Password.

IEEE Communications Society members: If you subscribe to the IEEE Electronic Periodicals Package or IEEE Electronic Periodicals Package Plus, you must access your subscription at www.comsoc.org.

Check with your librarian, information professional, or system manager to determine if you need to log in. Please complete the online Technical Support Form if you need assistance.

Select the Purchase History link to access the document. You will have 5 Days after purchase to access the Full Text PDF. Please complete the online Technical Support Form if you need assistance.

• Search and access Abstract records free of charge
• Register for table of contents alerts
• Purchase Full Text PDF documents

» Learn more about subscription options or how to become an IEEE Member.