A CMOS transceiver for 10-Mb/s and 100-Mb/s Ethernet
Everitt, J.; Parker, J.F.; Hurst, P.; Nack, D.; Rao Konda, K.
Solid-State Circuits, IEEE Journal of
Volume 33, Issue 12, Dec 1998 Page(s):2169 - 2177
Digital Object Identifier   10.1109/4.735701
Summary:A CMOS IC that implements the 802.3 Ethernet standards for 10- and 100-Mb/s data rates is described. The circuit uses mixed-signal techniques to perform transmit pulse shaping, receive adaptive line equalization, baseline wander compensation, and timing recovery. The IC occupies 23 mm² in a 0.6-μm single-poly CMOS process and dissipates 850 mW from a 5-V supply

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