Berger check prediction for concurrent error detection in the Braunarray multiplier
Jones, C.M.; Dlay, S.S.; Naguib, R.G.
Electronics, Circuits, and Systems, 1996. ICECS apos;96., Proceedings of the Third IEEE International Conference on
Volume 1, Issue , 13-16 Oct 1996 Page(s):81 - 84 vol.1
Digital Object Identifier 10.1109/ICECS.1996.582691
Summary:We develop the Berger Check Symbol Prediction and report the
performance benefit for the realisation of practical concurrent error
detection systems. Furthermore, we show that the Berger coded Braun
array multiplier can not only achieve the objective for detecting
unidirectional faults but analysis has indicated an inherent ability of
this prediction technique for error detection beyond the scope for which
it was originally intended. In fact the coding provides error
detectability for single and multiple stuck at faults. Further study
suggests the performance of the Berger check prediction Braun array
multiplier tends towards 100% error detectability for increasing input
bit length and array dimensions. The Berger check predictive Braun array
multiplier has introduced a high level of concurrent error detectability
with only a minimal extension in the hardware implementation
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