A 1.9-GHz wide-band IF double conversion CMOS receiver for cordlesstelephone applications
Rudell, J.C.; Ou, J.-J.; Cho, T.B.; Chien, G.; Brianti, F.; Weldon, J.A.; Gray, P.R.
Solid-State Circuits, IEEE Journal of
Volume 32, Issue 12, Dec 1997 Page(s):2071 - 2088
Digital Object Identifier 10.1109/4.643665
Summary:A monolithic 1.9-GHz, 198-mW, 0.6-μm CMOS receiver which meets
the specifications of the Digital Enhanced Cordless Telecommunications
(DECT) standard is described. All of the RF, IF, and baseband receiver
components, with the exception of the frequency synthesizers, have been
integrated into a single chip solution. A description is given of a
wide-band IF with double conversion architecture which eliminates the
need for the discrete-component noise and IF filters in addition to
facilitating the eventual integration of the frequency synthesizer
blocks with on-chip VCO's. The prototype device utilizes a 3.3-V supply
and includes a low noise amplifier, an image-rejection mixer, and two
quadrature baseband signal paths each of which includes a second-order
Sallen and Key anti-alias filter, an eighth-order switched-capacitor
filter network followed by a 10-b pipelined analog-to-digital converter
(ADC). The experimental device has a measured receiver reference
sensitivity of -90 dBm, an input referred IP3 of -7 dBm, a P-1 dB
of -24 dBm, and an image-rejection ratio of -55 dBc across the
DECT bands
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